1. Field of the Invention
The present invention relates to a solid image sensor. More particularly, the present invention relates to an image sensor capable of lowering a dark current and forming a uniform depletion layer in all pixels. The present invention is applicable to all kinds of image sensors having a pinned photodiode, and is especially advantageous to a CIS (CMOS Image Sensor).
2. Description of the Prior Art
In general, a CMOS image sensor converts colliding photons into electrons collected in a sensor pixel to detect light. To this end, a pixel of the CMOS image sensor includes a photodiode. Especially, the pixel of the CMOS image sensor includes a pinned photodiode to reduce a dark current and increase the quantity of accumulated charges.
FIG. 1 is a sectional view showing a 4 T pixel having one photodiode and 4 transistors according to the related art and illustrates a related circuit diagram.
Referring to FIG. 1, after forming a p− silicon epi-layer 101 on a p+ silicon substrate 100, the surface of the p− silicon epi-layer 101 is etched, thereby forming an STI (Shallow Trench Isolation) region filled with a silicon dioxide 103. The silicon dioxide 103 covers a remaining pixel surface.
First and second shallow p+ doping regions 104a and 104b serve as a passivation layer for a lower portion and sidewalls of the STI region as well as a pixel surface. The first shallow p+ doping region 104a of the pixel surface serves as a pinning layer of a pinned photodiode, and the second shallow p+ doping region 104b, which is a passivation layer for the lower portion and the sidewalls of the STI region, serves as a potential barrier to prevent crosstalk from occurring between pixels.
If a ground voltage is applied to the p+ silicon substrate 100 and a Vdd voltage is supplied to an n type doping region 105, the n type doping region 105 including a pinned photodiode is fully depleted, so that a depletion region 109 can be formed. In this case, the first shallow p+ doping region 104a serving as the pinning layer prevents the depletion region 109 from being expanded to an interface (that is, the surface of a silicon epi-layer) between silicon and silicon dioxide, thereby blocking a dark current from being generated. In this case, a state in which the depletion region 109 does not reach the silicon surface is called “surface pinning”.
Photo-charges are collected in the n type doping region 105 of the pinned photodiode. After the charge collection cycle has been completed, the charges from the n type doping region 105 immediately turn on a gate 107 so that the charges are delivered to an FD (Floating Diffusion) region 106. The FD region 106 is reset to proper potential (e.g., Vdd) by a reset transistor 118. The charges of the FD region 106 are detected by a source follower transistor 114. The pixel is addressed by a selective transistor 115
A control signal is supplied to a pixel through a transfer gate bus (for a signal Tx) 112, a reset gate bus (for a signal Rx) 120, and an address gate bus (for a signal Sx) 121. The output from the pixel is supplied to a pixel column bus 116.
When photons 122 collide on a pixel, the photons 122 are infiltrated into a silicon bulk according to the wavelengths thereof, thereby forming an electron-hole pair. Electrons are generated in a non-depletion region as well as a depletion region 108. Electrons 110 generated from the non-depletion region of silicon are diffused into the n type doping region 105.
However, electrons generated from a neutral non-depletion region may be diffused in a lateral direction. Accordingly, crosstalk may occur between pixels even though the second shallow p+ doping region 104b is formed. Therefore, a depletion region depth (Xc) 111 has to be a proper value.
Meanwhile, as described above, the first shallow p+ doping region 104a, which is a pinning layer, is used for surface pinning. To this end, the doping level of the first shallow p+ doping region 104a has to be optimized. As generally known to those skilled in the art, the depletion layer in a PN junction is determined according to the doping levels of P and N doping layers and potential difference between two doping layers.
However, according to the existing technology, the thickness of the depletion layer is determined only by the doping level, and the pinning layer has ground potential.
However, the pinning layer does not have full ground potential, but is put in a floating state. This is because the pinning layer is spaced apart from the silicon substrate 101 at a predetermined distance by another layer (that is, p epi-layer) having high resistance, and because the resistance of the p epi-layer varies according to the depth of the STI region.
As a result, the pinning layer of the photodiode in a conventional image sensor has unstable potential, so that stable surface pinning cannot be achieved.
In addition, when uniform potential is transferred to the pinning layers in all pixels, uniform surface pinning can be achieved between pixels. However, in the conventional technology, uniform surface pinning between pixels cannot be acquired due to the above reasons.